About to Xv6 Kernel 27 Plic Platform Level Interrupt Controller
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[RISC-V] PLIC Interrupt Controller Workflow: From Peripheral to Interrupt Handler
CS 134 OS—8: Interrupts in xv6
xv6 Kernel-26: Traps in Kernel Mode
xv6 Kernel-10: Context Switching
xv6 Kernel-21: Process Creation
Serial driver, platform level interrupt controller changes for RISC-V
xv6 Kernel-4: Spinlocks
RISCY BUSINESS - Day 6: Studying the PLIC
xv6 Kernel-18: uart.c and console.c
[RISC-V] Introduction to the Interrupt Controller for Embedded Developers
RISC-V Privilege #12: Exceptions, Interrupts, and the PLIC
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Last Updated: August 24, 2026
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![[RISC-V] How PLIC (Platform-level interrupt controller) works Guide](https://i.ytimg.com/vi/I1iurJ2aPQU/mqdefault.jpg)
![[RISC-V] PLIC Interrupt Controller Workflow: From Peripheral to Interrupt Handler](https://i.ytimg.com/vi/ujQxGJJuy1Y/mqdefault.jpg)
![[RISC-V] Introduction to the Interrupt Controller for Embedded Developers](https://i.ytimg.com/vi/bdfbWvmzP1I/mqdefault.jpg)
